PORTLAND, Ore. � Dante IP media network technology developer Audinate is looking to expand its reach by simplifying the installation of Dante in standard FPGA assemblies used by OEMs in building media equipment; reducing the need for dedicated chips.
Called Dante IP Core, it is a software set that the company says, �efficiently runs alongside OEM product applications such as ASRC, audio encryption, and signal processing on a range of Xilinx FPGAs, providing channel counts up to 512 x 512 with ultralow latency and sub-microsecond synchronization.� It adds that IP Core �provides all the interfaces required to be a fully functional Dante endpoint, including SiLabs clock synthesis, serial and parallel audio, DDR2 and SRAM, and a variety of standard control interfaces including UART, SPI and I2C.�
Pointing to Xilinx products, Audinate says that IP Core is compatible with the Spartan 6 family of FPGAs and a compatible version for the Artix 7 line should be coming in Q1 2018.�
Audinate Senior VP of Engineering Chris Ware said, �Dante IP Core gives savvy manufacturers something they�ve been requesting for a long time. � By integrating Dante IP into FPGA-based product designs, they can save costs, reduce board space, and more easily manage thermal constraints while adding features their customers demand.�